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CVE-2018-5407

MediumPublished

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on...

Published: Nov 15, 2018
Updated: Aug 5, 2024
Assigning CNA: certcc
Evidence observed: Nov 2, 2018

Primary CVSS

4.7/ 10Medium

nvd · CVSS 3.1

CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:N

EPSS probability estimate

3.4%

Low · next 30 days

Percentile: 88.4%
Model date: Sep 21, 2026

EPSS is a statistical estimate, not a certainty or a measure of impact. Combine it with CVSS, KEV status, exposure and your environment.

Summary

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

Sources

Intel (Skylake / Kaby Lake) - 'PortSmash' CPU SMT Side-ChannelExploit
Billy Brumley · hardware · Nov 2, 2018

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